The present invention pertains to the field of solid state storage devices, and more particularly to the field of add-on high speed solid state storage devices.
In recent years advancements in integrated circuit technology have enabled development of memory chips of greatly increased capacity, reducing the cost per unit storage for solid state storage devices. Pursuant to both the cost reductions and the greatly reduced space requirements, solid state storage devices have become increasingly popular as an alternative or supplement to magnetic storage devices such as tapes or disk drives, particularly in I/O bound processing systems.
While such "solid state disk" storage devices have been provided in the prior art, certain design barriers have limited their capacity and speed. For example, as capacity has been increased worst case propagation delay has become quite a significant speed limiting design parameter, notwithstanding the significant increases in packaging density that have been accomplished through advanced cooling techniques. In additon, due to physical limitations on the number of interconnection pins which can be provided and constraints on the number and length of interconnection wires, the distribution of addressing controls and data also becomes ever more problematic as capacity is sought to be increased. Still other significant problems are presented in the case where dynamic RAM storage devices are utilized which require periodic refresh characterized by sudden and high current supply demands which, if not dealt with adequately, will result in unacceptable levels of system noise.